读书笔记:计算机体系结构-量化研究方法

目录

1 量化设计与分析基础

1.1 指令集体系结构(ISA: Instruction set architecture)

WIKI:

An instruction set architecture (ISA) is an abstract model of a computer. It is also referred to as architecture or computer architecture. A realization of an ISA is called an implementation. An ISA permits multiple implementations that may vary in performance, physical size, and monetary cost (among other things); because the ISA serves as the interface between software and hardware. Software that has been written for an ISA can run on different implementations of the same ISA. This has enabled binary compatibility between different generations of computers to be easily achieved, and the development of computer families. Both of these developments helped to lower the cost of computers and to increase their applicability. For these reasons, the ISA is one of the most important abstractions in computing today.

An ISA defines everything a machine language programmer needs to know in order to program a computer. What an ISA defines differs between ISAs; in general, ISAs define the supported data types, what state there is (such as the main memory and registers) and their semantics (such as the memory consistency and addressing modes), the instruction set (the set of machine instructions that comprises a computer's machine language), and the input/output model.

An instruction set architecture is distinguished from a microarchitecture, which is the set of processor design techniques used, in a particular processor, to implement the instruction set. Processors with different microarchitectures can share a common instruction set. For example, the Intel Pentium and the Advanced Micro Devices Athlon implement nearly identical versions of the x86 instruction set, but have radically different internal designs.

The concept of an architecture, distinct from the design of a specific machine, was developed by Fred Brooks at IBM during the design phase of System/360.

2 存储器层次结构设计

2.1 Introduction

表1  Memory Hierarchy Measurements
Name Register L1 Cache L2 Cache L3 Cache RAM Disk
Size 1K 64K 256K 2-4MB 16-64GB 4-16TB
Speed 300ps 1ns 3-10ns 10-20ns 50-100ns 5-10ms
Times 1 3 30 60 300 300万

时间说明参考Time单位

2.1.1 Basic of Memory Hierarchies: A Quick Review

  • direct mapped cache
  • n-way set associative
  • fully associative